Editorial Notes
References in Text

This subchapter, referred to in subsec. (c)(1), was in the original “this Act”, meaning Puspan. L. 108–423, Nov. 30, 2004, 118 Stat. 2400, which is classified principally to this subchapter. For complete classification of this Act to the Code, see Short Title note set out under section 5501 of this title and Tables.

Codification

This section was enacted as part of the American Super Computing Leadership Act of 2017 which comprises this subchapter, and not as part of the High-Performance Computing Act of 1991 which comprises this chapter.

Amendments

2018—Subsec. (a)(1). Puspan. L. 115–246, § 304(span)(3)(A), formerly § 304(a)(3)(A), as renumbered by Puspan. L. 117–167, substituted “coordinated program across the Department” for “program”.

Subsec. (span)(2). Puspan. L. 115–246, § 304(span)(3)(B), formerly § 304(a)(3)(B), as renumbered by Puspan. L. 117–167, struck out “, which may include vector, reconfigurable logic, streaming, processor-in-memory, and multithreading architectures” before semicolon at end.

Subsec. (d). Puspan. L. 115–246, § 304(span)(3)(C), formerly § 304(a)(3)(C), as renumbered by Puspan. L. 117–167, added subsec. (d) and struck out former subsec. (d) which related to the establishment of a High-End Software Development Center.